Building a Modern Computer 1.5-1.8

Continuing from last week’s post covering the basics of boolean algebra, Hardware Description Language, and elementary logic gates, we delve further this week talking about hardware simulation, multi-bit busses, and an overview of the first project that we will be building next week. If you want to missed the last two posts, start here.

Hardware Simulation (1.5)

The hardware simulator software that is included with the course allows us to run the chips that we will be writing as a part of this project. Each chip that we will be building is scaffolded out in a file (.hdl). Each chip has a companion test file (.tst) that will import the chip and run it to test the output. The output of the test goes to an output file (.out). The output in the output file is then compared with the compare file (.cmp) to verify if the chip was built to our behavioral expectations.

In chip design, there are usually two parties. The system architects decides what chips are needed and the developers actually build the chips. In this course, the instructors are playing the role of the system architects and we are playing the role of the developers.

Multi-Bit Busses (1.6)

Up until this point when we have mentioned building a chip, it has been with a singular output and a small number of inputs. Each input and output would be a bit. But sometimes we want to deal with many bits at the same time. When that happens, we use a bus. A bus is a way to think of a bunch of bits together. Busses can be broken into sub-busses, such as two 8-bit busses going into a single 16-bit input. Busses allow us to build much more complex chips with many bits.

Project 1 Overview (1.7)

In this first project, we will be building approximately thirty different chips. We will be using our NAND chip as the basis of our whole computer to build all of the other logic chips. Starting with elementary chips like AND and OR chips, we will move on to more advanced chips like 16-bit variants such as AND16 and OR16 and multi-way variants like MUX4-WAY16. Once we build these, they will be used to build more complex chips in the future projects.

Here is an summary of the Hack Chip Set that is a part of the course. It provides an overview of the APIs for each chip as well as a description that describes how the chip might be used.

Perspective (1.8)

The next step is to use all of the information to construct the chips in project 1. Each chip can and should be tested, but the individual logic can vary within each chip. As long as the output matches the compare file when the test is run, the chip is complete. It is up to us to make the logic as simple and elegant as we can, but again, as long as the tests pass, the chip is ready to go.

The chips cannot be used recursively, which means we cannot use the AND chip within the logic for the AND chip. Basically, the chip cannot use it’s own logic within the chip itself. But we can use other chip logic inside of each chip we will be building to make things simpler. For example, we will not have to rewrite an AND chip every time we need it. We can use the one we already built.

That being said, the order given in the course follows a logic progression that doesn’t have to be followed, but will provide a good roadmap to build the chips from the simplest to more advanced complexity.

Conclusion

I am excited to begin building the logic for these chips as the first project in this course. I will not be sharing my chip examples as the course discourages this practice so that the we can all learn without the influence of looking at someone else’s work. But I believe the course prepared me to be able to take on this task with all of the necessary tools and I am pleased with the instructional videos of the course so far as well as the book.

If you are following along, good luck in coding your HACK chip set for the project.